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[Other resource] Sdram_Control_4Port

Description: ALTERA 的关于对SDRAM控制器操作的verilog相关程序，很不错绝对值得借鉴。
Platform: | Size: 13230 | Author: 邹振兴 | Hits:

[Other resource] H1wQqGvI

Description: 详细介绍了ALTERA器件的IP CORE以及如何使用SDR SDRAM CONTROL
Platform: | Size: 777515 | Author: 黄辉辉 | Hits:

[Other resource] source

Description: SDRAM通用接口程序，和Altera所给标准一致
Platform: | Size: 14630 | Author: 王并 | Hits:

[Other resource] sdram

Description: sdram test controller altera
Platform: | Size: 1520122 | Author: yangchun | Hits:

[Other resource] AlteraSdramIP

Description: Altera Sdram IP 源码，VHDL写的
Platform: | Size: 781651 | Author: 张敏 | Hits:

[VHDL-FPGA-Verilog] Sdram_Control_4Port

Description: ALTERA 的关于对SDRAM控制器操作的verilog相关程序，很不错绝对值得借鉴。-ALTERA on the operation of the SDRAM controller Verilog procedures, it is definitely worth a good draw.
Platform: | Size: 13312 | Author: 邹振兴 | Hits:

[VHDL-FPGA-Verilog] altera_sdram

Description: Simple SDRAM controller source code for Altera DE2 board
Platform: | Size: 7168 | Author: leblebitozu | Hits:

[VHDL-FPGA-Verilog] 1189152740

Description: DDR2 SDRAM 控制器的FPGA实现-DDR2 SDRAM controller FPGA to achieve
Platform: | Size: 84992 | Author: 白皓 | Hits:

[VHDL-FPGA-Verilog] tut_DE2_sdram_vhdl

Description: This tutorial explains how the SDRAM chip on ltera’s DE2 Development and Education board can be used with a Nios II system implemented by using the Altera SOPC Builder.
Platform: | Size: 546816 | Author: *Roma* | Hits:

[Other] de2usermanualinChinese

Description: de2中文用户手册 有用ALTERA开发平台的可以参考这个中文版本的指导手册，里面有详细的操作指导以及一些典型的开发案例。-de2 user manual Chinese ALTERA development platform that can be useful to refer to the Chinese version of the instruction manual, which has detailed operational guidance as well as the development of some typical cases.
Platform: | Size: 5675008 | Author: isee | Hits:

[VHDL-FPGA-Verilog] altera_avalon_sdram_slave

Description: Altera avalon sdram controller salve.
Platform: | Size: 5120 | Author: liubo | Hits:

[VHDL-FPGA-Verilog] DE0_SDRAM

Description: DE0开发板SDRAM测试程序，10为拨码开关作为数据写入SDRAM中存储，在读出用7段数码管显示-ALTERA DE0 SDRAM
Platform: | Size: 7825408 | Author: 柳春青 | Hits:

[VHDL-FPGA-Verilog] SDRAM

Description: 对SDRAM通信协议进行了介绍，而且比较详细，还包含了ALTERA的部分芯片-some information and description about SDRAM
Platform: | Size: 178176 | Author: lvz | Hits:

[VHDL-FPGA-Verilog] SDR_SDRAM_IP

Description: SDR SDRAM 控制器，Altera官网重要资料。内涵说明文档，和VHDL与Verilog两种设计IP。-SDR SDRAM controller from Altera
Platform: | Size: 2360320 | Author: peteryu010 | Hits:

[VHDL-FPGA-Verilog] sdr-sdram-controller-source-code

Description: altera 公司sdr sdram 控制器源码，是VHDL的，大家选择下载-The altera sdr sdram controller source, the VHDL, we choose to download
Platform: | Size: 16384 | Author: 梦殇 | Hits:

[VHDL-FPGA-Verilog] Altera-SDRAM_controller-IP-CORE

Description: ALTRA官方提供的SDRAM的控制内核，VHDL和VERILOG版本都有，希望对大家有用-The ALTRA official SDRAM control kernel, VHDL and VERILOG version have the hope that useful
Platform: | Size: 2378752 | Author: mr jiang | Hits:

[Other] sdr-sdram-verilog

Description: SDRAM IP CORE,ALTERA提供-SDRAM IP CORE,ALTERA
Platform: | Size: 1277952 | Author: wushj | Hits:

[Other] Altera-SDRAM_controller-IP-CORE

Description: Altera的SDRAM IP核代码，支持源码创作-Altera s SDRAM IP core code to support the creation of source
Platform: | Size: 3500032 | Author: chen600 | Hits:

[VHDL-FPGA-Verilog] my_sdram_mdl

Description: 此功能为altera fpga 的sdram 控制器，串口接收与发送(This feature altera fpga sdram controller, serial port to receive and send)
Platform: | Size: 1206272 | Author: flyhouse112 | Hits:

[VHDL-FPGA-Verilog] sdr_sdram

Description: sdram使用接口仿真，altera公司ip使用方法(sdram verilog. SDRAM using interface simulation, Altera company IP use method)
Platform: | Size: 12288 | Author: 风雪来 | Hits:
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